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File _service:gitpkg:0017-target-arm-Implement-AArch64-OSLAR_EL1-sysreg-as-WI.patch of Package qemu-usermode

From 6ce0256d52eb80405e79375116b1d33c4a25365e Mon Sep 17 00:00:00 2001
From: Peter Maydell <peter.maydell@linaro.org>
Date: Sat, 15 Feb 2014 16:07:10 +0000
Subject: [PATCH] target-arm: Implement AArch64 OSLAR_EL1 sysreg as WI

Define a dummy version of the AArch64 OSLAR_EL1 system register
which just ignores writes. Linux will always write to this (it
is the OS lock used for debugging), but we don't support debug.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
---
 target-arm/helper.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/target-arm/helper.c b/target-arm/helper.c
index 53ee3a0..c9ea2a2 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -1738,6 +1738,10 @@ static const ARMCPRegInfo v8_cp_reginfo[] = {
     { .name = "MDSCR_EL1", .state = ARM_CP_STATE_AA64,
       .opc0 = 2, .opc1 = 0, .crn = 0, .crm = 2, .opc2 = 2,
       .access = PL1_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
+    /* We define a dummy WI OSLAR_EL1, because Linux writes to it. */
+    { .name = "OSLAR_EL1", .state = ARM_CP_STATE_AA64,
+      .opc0 = 2, .opc1 = 0, .crn = 1, .crm = 0, .opc2 = 4,
+      .access = PL1_W, .type = ARM_CP_NOP },
     REGINFO_SENTINEL
 };
 
-- 
1.9.3

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File _service:gitpkg:0017-target-arm-Implement-AArch64-OSLAR_EL1-sysreg-as-WI.patch of Package qemu-usermode

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